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The protocols to maintain coherence for multiple processors are called CacheCoherenceProtocols
A memory system is coherent if (P-process, X[value]-location)
Program order Preserved: P-->X[10], P<--X[10], essentially you read what you wrote before provided no one else wrote to X!
Memory Coherence: P2-->X[5], P1<--X[5], essentially you read what someone else wrote to X if they wrote it before you.
Serialization: Writes to the same location are serialized: two writes to the same location are seen in the same order by all processors!
There are two classes of protocols:
- Directory Based protocols
- Snooping protocols
A common technique called write invalidate protocol ensures that a processor has exclusive access to data item before it writes to that item. It is called the invalidate protocol because it invalidates other copies on a write. This is by far the most common technique of all the snooping protocols and directory based protocols.
A second technique called write update or write broadcast, update all the cache copies of the data item when that item is written. The invalidate protocol works on cache blocks while in a update protocol must work on individual words.
Because bus and memory bandwidth is usually the commodity most in demand in a bus based multiprocessor, and since invalidation protocols generate less bus and memory traffic, invalidation has become the protocol of choice for almost all multiprocessors.
Snooping Protocols
Every cache that has a copy of the data from a block of physical memory also has a copy of the sharing status of the block, and no centralized state is kept. The caches usually have a shared memory bus and all cache controllers monitor or snoop the bus to determine whether or not they have a copy of the block that is requested on the bus.
Directory based protocols
The sharing status of a block of physical memory is kept in just one location, called the directory.
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