Diff for "ComputerTerms"

Differences between revisions 51 and 105 (spanning 54 versions)

AddressingModes
AmdahlsLaw
AreaBorderRouter
AffineMotion
AutonomousSystem (AS)
AverageNormalizedExecutionTime
["Bijection"]
BooleanAlgebra
BooleanTerm
BoothsAlgorithm
CaChe
CidrVsSubnetting (CIDR, Subnetting and Class A-E Definitions)
CompleteLogic What does it mean for a logic to be complete
CpuTime
CriticalSection
CyclesPerInstruction (CPI)
DataPath
["Decidable"] and SemiDecidable
DelayBandwidthProduct
DelayedBranch
["Dichotomy"]
DijkstrasAlgorithm
DisjunctiveSyllogism
DistanceVector
ExecutionTime
FirstOrderPredicateLogic
FirstOrderPredicateLogicQuatifiers
FiveClassicPartsOfaComputer
FixedPoint
FloatingPointRepresentation (IEEE 754)
ForwardingVsRouting
FrameBuffer
FreeBooleanAlgebra
GeometricMean
GroundClause
GroundBooleanTerm
HammingCode
HardwareDesignPrinciples
HypotheticalSylogism
InteriorGatewayRoutingProtocol (IGRP)
InterNet
InternetProtocolV4 (IPv4)
InternetProtocolV6 (IPv6)
InternetWork
InstructionSetArchitecture (ISA)
LogicalImplication (|= symbol and also
LogicalMemory
IpCheckSum
["Latency"]
LinearlyDecomposableDomains
LinkerSteps
LinkState
MaximumTransmissionUnit (MTU)
MemoryHierarchy
MemoryStallClockCycles
["Model"] of a logic formula
ModusPonens
MonotoneBooleanTerm
ObjectFile
OpenShortestPathFirst OSPF
OsiModel (7 layer OSI network Model)
PageTable
["Performance"]
PipeLine
PredicateSymbols
PowerSet
["Proposition"] or PropositionalLogic
["Processor"] or CPU
QueuingTheory
RaceCondition
RecursivelyEnumerableSets
["Register"] (MIPS register)
RelationallyComplete
ResponseTime
RoutingArea
RoutingInformationProtocol (RIP)
RoutingPathologies
["Satisfiable"]
SemanticsSyntaxSortsInLogic
SemiDecidable and ["Decidable"]
SequenceNumber
SlidingWindowProtocol
SpatialExtent
SpeedUp
SuperScalar
["Tautology"]
TcpFastRetransmit
TcpFastRecovery
ThroughPut
TransmissionControlProtocol (TCP)
["taxonomy"]
UnaryConstraintDomain
["Undecidable"]
["Valid"] Logic Formula
VirtualMemory
WallClockTime

-  ⇤ ← Revision 51 as of 2003-10-29 19:16:12 → 
  Size: 1333
  Editor: yakko
  Comment:
+   ← Revision 105 as of 2004-03-18 20:54:38 → ⇥
  Size: 2498
  Editor: yakko
  Comment:
-Deletions are marked like this.
+Additions are marked like this.
 Line 1:
+   * AddressingModes
   * AmdahlsLaw
-Line 4:
+Line 6:
+   * AverageNormalizedExecutionTime
   * ["Bijection"]
   * BooleanAlgebra
   * BooleanTerm
   * BoothsAlgorithm
   * CaChe
-Line 6:
+Line 14:
+   * CpuTime
   * CriticalSection
   * CyclesPerInstruction (CPI)
   * DataPath
   * ["Decidable"] and SemiDecidable
   * DelayBandwidthProduct
   * DelayedBranch
-Line 10:
+Line 25:
+   * ExecutionTime
-Line 12:
+Line 28:
+   * FiveClassicPartsOfaComputer
   * FixedPoint
   * FloatingPointRepresentation (IEEE 754)
-Line 13:
+Line 32:
+   * FrameBuffer
   * FreeBooleanAlgebra
   * GeometricMean
-Line 14:
+Line 36:
+   * GroundBooleanTerm
   * HammingCode
   * HardwareDesignPrinciples
-Line 20:
+Line 45:
+   * InstructionSetArchitecture (ISA)
-Line 21:
+Line 47:
+   * LogicalMemory
-Line 22:
+Line 49:
+   * ["Latency"]
-Line 23:
+Line 51:
+   * LinkerSteps
-Line 25:
+Line 54:
+   * MemoryHierarchy
   * MemoryStallClockCycles
-Line 27:
+Line 58:
-   * MultiProtocolLabelSwitching (MPLS)
+   * MonotoneBooleanTerm
   * ObjectFile
-Line 30:
+Line 62:
+   * PageTable
   * ["Performance"]
   * PipeLine
-Line 33:
+Line 68:
+   * ["Processor"] or CPU
   * QueuingTheory
   * RaceCondition
   * RecursivelyEnumerableSets
   * ["Register"] (MIPS register)
   * RelationallyComplete
   * ResponseTime
-Line 38:
+Line 80:
+   * SemiDecidable and ["Decidable"]
-Line 40:
+Line 83:
+   * SpatialExtent
   * SpeedUp
   * SuperScalar
-Line 41:
+Line 87:
+   * TcpFastRetransmit
   * TcpFastRecovery
   * ThroughPut
-Line 46:
+Line 95:
+   * VirtualMemory
   * WallClockTime