|
Size: 1333
Comment:
|
Size: 3012
Comment:
|
| Deletions are marked like this. | Additions are marked like this. |
| Line 1: | Line 1: |
| * AddressingModes * AmdahlsLaw |
|
| Line 4: | Line 6: |
| * AverageNormalizedExecutionTime * ["Bijection"] * BooleanAlgebra * BooleanTerm * BoothsAlgorithm * CaChe * CacheBlock * CacheCoherenceProtocols * CacheLine |
|
| Line 6: | Line 17: |
| * CpuTime * CriticalSection * ["Cryptography"] * CyclesPerInstruction (CPI) * DataPath * ["Decidable"] and SemiDecidable * DelayBandwidthProduct * DelayedBranch |
|
| Line 10: | Line 29: |
| * DynamicSetOperations * ExecutionTime * ExpectedValue * FileSystem (Free BSD) |
|
| Line 12: | Line 35: |
| * FirstOrderTheory * FiveClassicPartsOfaComputer * FixedPoint * FloatingPointRepresentation (IEEE 754) |
|
| Line 13: | Line 40: |
| * FrameBuffer * FreeBooleanAlgebra * GeometricMean * GraphTheoryPage |
|
| Line 14: | Line 45: |
| * GroundBooleanTerm * HammingCode * HardwareDesignPrinciples |
|
| Line 15: | Line 49: |
| * InformationRetrieval | |
| Line 20: | Line 55: |
| * LogicalImplication (|= symbol and also |-) | * InstructionSetArchitecture (ISA) * InvertedFile * LogicalImplication ([[latex2($$\models$$)]] and [[latex2($$\vdash$$)]]) * LogicalMemory (START EDITING HERE) |
| Line 22: | Line 60: |
| * ["Latency"] * LeastFixedPoint |
|
| Line 23: | Line 63: |
| * LinkerSteps | |
| Line 25: | Line 66: |
| * MemoryHierarchy * MemoryStallClockCycles |
|
| Line 27: | Line 70: |
| * MultiProtocolLabelSwitching (MPLS) | * MonotoneBooleanTerm * ObjectFile |
| Line 30: | Line 74: |
| * PageTable * ["Performance"] * PipeLine * PostingsFile |
|
| Line 31: | Line 79: |
| * PresburgerArithmetic | |
| Line 33: | Line 82: |
| * ["Processor"] or CPU * QueuingTheory * RaceCondition * RecursivelyEnumerableSets * ["Register"] (MIPS register) * RelationallyComplete * ResponseTime |
|
| Line 38: | Line 94: |
| * SemiAlgebraicSets * SemiDecidable and ["Decidable"] * SemiLinearSets |
|
| Line 40: | Line 99: |
| * SpatialExtent * SpeedUp * ["Steganography"] * SuperScalar |
|
| Line 41: | Line 104: |
| * ["taxonomy"] * TcpFastRetransmit * TcpFastRecovery * ThroughPut |
|
| Line 42: | Line 109: |
| * ["taxonomy"] | * TreeStructures |
| Line 45: | Line 112: |
| * UninterpretedFunctions | |
| Line 46: | Line 114: |
| * VirtualMemory * WallClockTime |
AutonomousSystem (AS)
- ["Bijection"]
CidrVsSubnetting (CIDR, Subnetting and Class A-E Definitions)
CompleteLogic What does it mean for a logic to be complete
- ["Cryptography"]
CyclesPerInstruction (CPI)
["Decidable"] and SemiDecidable
- ["Dichotomy"]
FileSystem (Free BSD)
FloatingPointRepresentation (IEEE 754)
InternetProtocolV4 (IPv4)
InternetProtocolV6 (IPv6)
LogicalImplication (latex2($$\models$$) and latex2($$\vdash$$))
LogicalMemory (START EDITING HERE)
- ["Latency"]
MaximumTransmissionUnit (MTU)
- ["Model"] of a logic formula
OsiModel (7 layer OSI network Model)
- ["Performance"]
["Proposition"] or PropositionalLogic
- ["Processor"] or CPU
- ["Register"] (MIPS register)
- ["Satisfiable"]
SemiDecidable and ["Decidable"]
- ["Steganography"]
- ["Tautology"]
- ["taxonomy"]
- ["Undecidable"]
- ["Valid"] Logic Formula