Differences between revisions 67 and 112 (spanning 45 versions)
Revision 67 as of 2004-01-23 16:14:07
Size: 1769
Editor: pcp048069pcs
Comment:
Revision 112 as of 2004-03-31 17:21:34
Size: 2650
Editor: yakko
Comment:
Deletions are marked like this. Additions are marked like this.
Line 1: Line 1:
   * AddressingModes
   * AmdahlsLaw
Line 4: Line 6:
   * AverageNormalizedExecutionTime
Line 7: Line 10:
   * BoothsAlgorithm
   * CaChe
   * CacheBlock
   * CacheLine
Line 9: Line 16:
   * CpuTime
   * CriticalSection
   * CyclesPerInstruction (CPI)
   * DataPath
Line 10: Line 21:
   * DelayBandwidthProduct
   * DelayedBranch
Line 12: Line 25:
   * DelayBandwidthProduct
Line 15: Line 27:
   * ExecutionTime
   * ExpectedValue
   * FileSystem (Free BSD)
Line 17: Line 32:
   * FiveClassicPartsOfaComputer
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   * FloatingPointRepresentation (IEEE 754)
Line 19: Line 36:
   * FrameBuffer
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   * GeometricMean
Line 22: Line 41:
   * HammingCode
   * HardwareDesignPrinciples
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   * InformationRetrievalSystem
Line 28: Line 50:
   * InstructionSetArchitecture (ISA)
   * InvertedFile
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   * LogicalMemory
Line 30: Line 55:
   * ["Latency"]
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   * LinkerSteps
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   * MemoryHierarchy
   * MemoryStallClockCycles
Line 35: Line 64:
   * MultiProtocolLabelSwitching (MPLS)
Line 37: Line 65:
   * ObjectFile
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   * PageTable
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   * PipeLine
   * PostingsFile
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   * ["Processor"] or CPU
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   * RaceCondition
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   * ["Register"] (MIPS register)
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   * ResponseTime
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   * SuperScalar
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   * ThroughPut
Line 64: Line 102:
   * VirtualMemory
   * WallClockTime

ComputerTerms (last edited 2020-02-02 17:49:07 by scot)