Diff for "ComputerTerms"

Differences between revisions 70 and 98 (spanning 28 versions)

AddressingModes
AmdahlsLaw
AreaBorderRouter
AffineMotion
AutonomousSystem (AS)
AverageNormalizedExecutionTime
["Bijection"]
BooleanAlgebra
BooleanTerm
BoothsAlgorithm
CidrVsSubnetting (CIDR, Subnetting and Class A-E Definitions)
CompleteLogic What does it mean for a logic to be complete
CpuTime
CyclesPerInstruction (CPI)
DataPath
["Decidable"] and SemiDecidable
DelayBandwidthProduct
DelayedBranch
["Dichotomy"]
DijkstrasAlgorithm
DisjunctiveSyllogism
DistanceVector
ExecutionTime
FirstOrderPredicateLogic
FirstOrderPredicateLogicQuatifiers
FiveClassicPartsOfaComputer
FixedPoint
FloatingPointRepresentation (IEEE 754)
ForwardingVsRouting
FrameBuffer
FreeBooleanAlgebra
GeometricMean
GroundClause
GroundBooleanTerm
HammingCode
HardwareDesignPrinciples
HypotheticalSylogism
InteriorGatewayRoutingProtocol (IGRP)
InterNet
InternetProtocolV4 (IPv4)
InternetProtocolV6 (IPv6)
InternetWork
InstructionSetArchitecture (ISA)
LogicalImplication (|= symbol and also
LogicalMemory
IpCheckSum
["Latency"]
LinearlyDecomposableDomains
LinkerSteps
LinkState
MaximumTransmissionUnit (MTU)
["Model"] of a logic formula
ModusPonens
MonotoneBooleanTerm
ObjectFile
OpenShortestPathFirst OSPF
OsiModel (7 layer OSI network Model)
PageTable
["Performance"]
PipeLine
PredicateSymbols
PowerSet
["Proposition"] or PropositionalLogic
["Processor"] or CPU
QueuingTheory
RecursivelyEnumerableSets
["Register"] (MIPS register)
RelationallyComplete
ResponseTime
RoutingArea
RoutingInformationProtocol (RIP)
RoutingPathologies
["Satisfiable"]
SemanticsSyntaxSortsInLogic
SemiDecidable and ["Decidable"]
SequenceNumber
SlidingWindowProtocol
SpatialExtent
SpeedUp
SuperScalar
["Tautology"]
TcpFastRetransmit
TcpFastRecovery
ThroughPut
TransmissionControlProtocol (TCP)
["taxonomy"]
UnaryConstraintDomain
["Undecidable"]
["Valid"] Logic Formula
VirtualMemory
WallClockTime

-  ⇤ ← Revision 70 as of 2004-01-25 16:02:09 → 
  Size: 1808
  Editor: yakko
  Comment:
+   ← Revision 98 as of 2004-03-09 22:42:58 → ⇥
  Size: 2393
  Editor: yakko
  Comment:
-Deletions are marked like this.
+Additions are marked like this.
 Line 1:
+   * AddressingModes
   * AmdahlsLaw
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+   * AverageNormalizedExecutionTime
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+Line 10:
+   * BoothsAlgorithm
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+   * CpuTime
   * CyclesPerInstruction (CPI)
   * DataPath
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+Line 17:
+   * DelayBandwidthProduct
   * DelayedBranch
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+Line 21:
-   * DelayBandwidthProduct
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+Line 26:
+   * FiveClassicPartsOfaComputer
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+Line 28:
+   * FloatingPointRepresentation (IEEE 754)
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+Line 30:
+   * FrameBuffer
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+Line 32:
+   * GeometricMean
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+Line 35:
+   * HammingCode
   * HardwareDesignPrinciples
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+Line 43:
+   * InstructionSetArchitecture (ISA)
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+Line 45:
+   * LogicalMemory
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+Line 47:
+   * ["Latency"]
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+Line 49:
+   * LinkerSteps
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+Line 54:
-   * MultiProtocolLabelSwitching (MPLS)
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+Line 55:
+   * ObjectFile
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+Line 58:
+   * PageTable
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+Line 60:
+   * PipeLine
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+Line 64:
+   * ["Processor"] or CPU
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+Line 67:
+   * ["Register"] (MIPS register)
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+   * SuperScalar
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+   * ThroughPut
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+   * VirtualMemory
   * WallClockTime