|
Size: 1893
Comment:
|
Size: 3253
Comment:
|
| Deletions are marked like this. | Additions are marked like this. |
| Line 1: | Line 1: |
| * AddressingModes * AmdahlsLaw |
|
| Line 8: | Line 10: |
| * BoothsAlgorithm * CaChe * CacheBlock * CacheCoherenceProtocols * CacheLine |
|
| Line 11: | Line 18: |
| * CriticalSection * [[Cryptography|Cryptography]] * CutFreeProof * CyclesPerInstruction (CPI) * DataPath |
|
| Line 12: | Line 24: |
| * DelayBandwidthProduct * DelayedBranch |
|
| Line 14: | Line 28: |
| * DelayBandwidthProduct | |
| Line 17: | Line 30: |
| * DynamicSetOperations | |
| Line 18: | Line 32: |
| * ExpectedValue * FileSystem (Free BSD) |
|
| Line 20: | Line 36: |
| * FirstOrderTheory * FiveClassicPartsOfaComputer |
|
| Line 21: | Line 39: |
| * FloatingPointRepresentation (IEEE 754) | |
| Line 22: | Line 41: |
| * FrameBuffer | |
| Line 24: | Line 44: |
| * GraphTheoryPage | |
| Line 26: | Line 47: |
| * HammingCode * HardwareDesignPrinciples |
|
| Line 27: | Line 50: |
| * InformationRetrieval | |
| Line 32: | Line 56: |
| * LogicalImplication (|= symbol and also |-) | * ["Interpolant"] * InstructionSetArchitecture (ISA) * InterfaceMessagingProcessor (IMP) * InvertedFile * LogicalImplication ([[latex2($$\models$$)]] and [[latex2($$\vdash$$)]]) * LogicalMemory (START EDITING HERE) |
| Line 35: | Line 64: |
| * LeastFixedPoint | |
| Line 36: | Line 66: |
| * LinkerSteps | |
| Line 38: | Line 69: |
| * MemoryHierarchy * MemoryStallClockCycles |
|
| Line 41: | Line 74: |
| * NetworkDelay * ObjectFile |
|
| Line 43: | Line 78: |
| * PageTable * PartialOrder |
|
| Line 44: | Line 81: |
| * PipeLine * PoSet (PartiallyOrderedSet) * PostingsFile |
|
| Line 45: | Line 85: |
| * PresburgerArithmetic | |
| Line 47: | Line 88: |
| * ["Processor"] or CPU | |
| Line 48: | Line 90: |
| * RaceCondition | |
| Line 49: | Line 92: |
| * ["Register"] (MIPS register) | |
| Line 56: | Line 100: |
| * SemiAlgebraicSets | |
| Line 57: | Line 102: |
| * SemiDefinite * SemiLinearSets |
|
| Line 61: | Line 108: |
| * ["Steganography"] * SuperScalar |
|
| Line 62: | Line 111: |
| * ["taxonomy"] | |
| Line 66: | Line 116: |
| * ["taxonomy"] | * TreeStructures * TruthFunction (notation for [[latex2($\vdash$)]]) |
| Line 69: | Line 120: |
| * UninterpretedFunctions | |
| Line 70: | Line 122: |
| * VirtualMemory |
AutonomousSystem (AS)
- ["Bijection"]
CidrVsSubnetting (CIDR, Subnetting and Class A-E Definitions)
CompleteLogic What does it mean for a logic to be complete
CyclesPerInstruction (CPI)
["Decidable"] and SemiDecidable
- ["Dichotomy"]
FileSystem (Free BSD)
FloatingPointRepresentation (IEEE 754)
InternetProtocolV4 (IPv4)
InternetProtocolV6 (IPv6)
- ["Interpolant"]
LogicalImplication (latex2($$\models$$) and latex2($$\vdash$$))
LogicalMemory (START EDITING HERE)
- ["Latency"]
MaximumTransmissionUnit (MTU)
- ["Model"] of a logic formula
OsiModel (7 layer OSI network Model)
- ["Performance"]
["Proposition"] or PropositionalLogic
- ["Processor"] or CPU
- ["Register"] (MIPS register)
- ["Satisfiable"]
SemiDecidable and ["Decidable"]
- ["Steganography"]
- ["Tautology"]
- ["taxonomy"]
TruthFunction (notation for latex2($\vdash$))
- ["Undecidable"]
- ["Valid"] Logic Formula